Integrated circuit packaging system with a dual board-on-chip structure and method of manufacture thereof
US8106498B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2009 |
| Grant date | Jan 31, 2012 |
| Priority date | — |
| Expiry date | Oct 11, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacture of an integrated circuit packaging system includes: providing a first board-on-chip-structure having a first integrated circuit die mounted over a substrate and the substrate having a substrate cavity; mounting a second board-on-chip-structure over the first board-on-chip-structure, the second board-on-chip-structure having a second integrated circuit die mounted under an interposer and the interposer having an interposer cavity; connecting the first board-on-chip-structure to the second board-on-chip-structure with an internal interconnect; and encapsulating the first board-on-chip-structure, the second board-on-chip-structure, and the internal interconnect with an encapsulation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.