Assembly including plural through wafer vias, method of cooling the assembly and method of fabricating the assembly
US8106505B2 · kind B2 · utility
12Cited by
15References
1Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2007 |
| Grant date | Jan 31, 2012 |
| Priority date | — |
| Expiry date | Oct 31, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An assembly includes a chip including an integrated circuit, a casing including an integrated circuit and having an upper portion formed on a side of the chip and lower portion formed on another side of the chip, plural through-wafer vias (TWVs) for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, and a card connected to the casing for electrically connecting the casing to a system board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.