System and method for implementing a wafer acceptance test (“WAT”) advanced process control (“APC”) with novel sampling policy and architecture

US8108060B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Andy Tsen · Kaohsiung, TW
• Jo Fei Wang · Hsinchu, TW
• Po-Feng Tsai · Taipei, TW
• Ming-Yu Fan · Baoshan, TW
• Jill Wang · Hsinchu, TW
• Jong-I Mou · Guoxing Township, TW
• Sunny Wu · Hengshan, TW

Key dates

• Filing date: May 13, 2009
• Grant date: Jan 31, 2012
• Expiry date: Mar 24, 2030

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02P90/80
• WIPO field: Control
• WIPO sector: Instruments

Abstract

System and method for implementing wafer acceptance test (“WAT”) advanced process control (“APC”) are described. In one embodiment, the method comprises performing a key process on a sample number of wafers of a lot of wafers; performing a key inline measurement related to the key process to produce metrology data for the wafers; predicting WAT data from the metrology data using an inline-to-WAT model; and using the predicted WAT data to tune a WAT APC process for controlling a tuning process or a process APC process.