Semiconductor device
US8110870B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2009 |
| Grant date | Feb 7, 2012 |
| Priority date | — |
| Expiry date | Aug 6, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/411
Abstract
A semiconductor device has a semiconductor substrate having a surface layer and a p-type semiconductor region, wherein the surface layer includes a contact region, a channel region and a drift region, the channel region is adjacent to and in contact with the contact region, the drift region is adjacent to and in contact with the channel region and includes n-type impurities at least in part, and the p-type semiconductor region is in contact with the drift region and at least a portion of a rear surface of the channel region, a main electrode disposed on the surface layer and electrically connected to the contact region, a gate electrode disposed on the surface layer and extending from above a portion of the contact region to above at least a portion of the drift region via above the channel region, and an insulating layer covering at least the portion of the contact region and not covering at least the portion of the drift region. The gate electrode and the contact region are insulated by the insulating layer, and the gate electrode and the drift region are in direct contact to form a Schottky junction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.