Method of a multi-level cell resistance random access memory with metal oxides
US8111541B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2010 |
| Grant date | Feb 7, 2012 |
| Priority date | — |
| Expiry date | May 20, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and structure of a bistable resistance random access memory comprise a plurality of programmable resistance random access memory cells where each programmable resistance random access memory cell includes multiple memory members for performing multiple bits for each memory cell. The bistable RRAM includes a first resistance random access member connected to a second resistance random access member through interconnect metal liners and metal oxide strips. The first resistance random access member has a first resistance value Ra, which is determined from the thickness of the first resistance random access member based on the deposition of the first resistance random access member. The second resistance random access member has a second resistance value Rb, which is determined from the thickness of the second resistance random access member based on the deposition of the second resistance random access member.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.