Patent · US Active

Memory cell provided with dual-gate transistors, with independent asymmetric gates

US8116118B2 · kind B2 · utility

10Cited by
22References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 26, 2007
Grant dateFeb 14, 2012
Priority date
Expiry dateDec 26, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/62
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The invention concerns a random access memory cell comprising:

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.