Read only memory and method of reading same
US8116153B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 2010 |
| Grant date | Feb 14, 2012 |
| Priority date | — |
| Expiry date | Oct 14, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Read Only Memory (ROM) device includes a ROM array, a row address decoder, a column address decoder, a column multiplexer, and a control circuit. Data is stored in bit cells in the ROM array. The control circuit generates control signals for reading the ROM. The row address decoder selects a word line. The column address decoder enables a bit line. The data is sensed from a bit cell corresponding to the selected word line and the enabled bit line by a corresponding sense amplifier and delivered on a data output pin of the ROM. The control signals for enabling the bit line and the sense amplifier operate at a higher voltage than supply voltage of the ROM. This reduces the ROM read time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.