Method of making a semiconductor device using negative photoresist
US8119334B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 30, 2008 |
| Grant date | Feb 21, 2012 |
| Priority date | — |
| Expiry date | Nov 8, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/091
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Negative photoresist over an insulating layer is exposed to radiation according to a pattern for an opening in the insulating layer for filling conductive material. A post of the negative photoresist is left over the location where the opening in the insulating layer is to be formed. A developable hard mask is formed over the post by a spin-on process so that the hard mask over the post is much thinner than directly over the insulating layer. An etch back is performed to remove the hard mask from over the post so that the post of negative photoresist is thus exposed. The post is removed to form an opening in the hard mask. An etch is performed to form the opening in the insulating layer aligned to the opening in the hard mask. The opening in the insulating layer is filled with the conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.