Patent · US Active

Reducing the creation of charge traps at gate dielectrics in MOS transistors by performing a hydrogen treatment

US8119461B2 · kind B2 · utility

4Cited by

10References

3Claims

0Family size

Assignee

GlobalFoundries Inc. · KY

Inventors

Martin Trentzsch · Dresden, DE
Thorsten Kammler · Radeberg, DE
Rolf Stephan · Dresden, DE

Key dates

Filing date	Nov 1, 2010
Grant date	Feb 21, 2012
Priority date	—
Expiry date	Nov 1, 2030

Classification

Technology area (CPC H)Electricity
CPC primaryH10D30/62
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

By performing a heat treatment on the basis of a hydrogen ambient, exposed silicon-containing surface portions may be reorganized prior to the formation of gate dielectric materials. Hence, the interface quality and the material characteristics of the gate dielectrics may be improved, thereby reducing negative bias temperature instability effects in highly scaled P-channel transistors.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.