Integrated circuit arrangement with capacitor and fabrication method

US8124475B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Ralf Brederlow · Poing, DE
• Jessica Hartwich · Neubiberg, DE
• Christian Pacha · Birkenfeld, DE
• Wolfgang Rosner · Hersbruck, DE
• Thomas Schulz · Austin, US

Key dates

• Filing date: Mar 30, 2009
• Grant date: Feb 28, 2012
• Expiry date: Aug 14, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/80

Abstract

An integrated circuit arrangement contains an insulating region, which is part of a planar insulating layer, and a capacitor which contains: near and far electrode regions near and remote from the insulating region and a dielectric region. The capacitor and an active component are on the same side of the insulating layer, and the near electrode region and an active region of the component are planar and parallel to the insulating layer. The near electrode region is monocrystalline and contains multiple webs.