Dependency matrix with reduced area and power consumption

US8127116B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Saiful Islam · Austin, US
• Mary D. Brown · Austin, US
• Bjorn P. Christensen · Round Rock, US
• Sam Gat-Shang Chu · Round Rock, US
• Robert A. Cordes · Austin, US
• Maureen A. Delaney · South Burlington, US
• Jafar Nahidi · Round Rock, US
• Joel A. Silberman · Somers, US

Key dates

• Filing date: Apr 3, 2009
• Grant date: Feb 28, 2012
• Expiry date: Nov 22, 2029

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F9/3838
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A processor having a dependency matrix comprises a first array comprising a plurality of first cells. A second array couples to the first array and comprises a plurality of second cells. A first write port couples to the first array and the second array and writes to the first array and the second array. A first read port couples to the first array and the second array and reads from the first array and the second array. A second read port couples to the first array and reads from the first array. A second write port couples to the second read port, reads from the second read port and writes to the second array.