Jafar Nahidi
10Patents
4h-index
20Co-inventors
52Inventor score
Filing activity: Nov 24, 2003 → Apr 19, 2012
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8380964B2 | Processor including age tracking of issue queue instructions | Physics | 13 | Active |
| US7254697B2 | Method and apparatus for dynamic modification of microprocessor instruction group at dispatch | Physics | 11 | Expired |
| US8127116B2 | Dependency matrix with reduced area and power consumption | Physics | 10 | Active |
| US7243209B2 | Apparatus and method for speeding up access time of a large register file with wrap capability | Physics | 6 | Expired |
| US7478276B2 | Method for checkpointing instruction groups with out-of-order floating point instructions in a multi-threaded processor | Physics | 3 | Active |
| US8489863B2 | Processor including age tracking of issue queue instructions | Physics | 3 | Active |
| US8356267B2 | Statistical method for hierarchically routing layout utilizing flat route information | Physics | 3 | Active |
| US7663963B2 | Apparatus and method for providing multiple reads/writes using a 2Read/2Write register file array | Physics | 2 | Active |
| US7400548B2 | Method for providing multiple reads/writes using a 2read/2write register file array | Physics | 0 | Active |
| US7243170B2 | Method and circuit for reading and writing an instruction buffer | Physics | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.