Patent · US Active

System and method for level shifter

US8130558B2 · kind B2 · utility

0Cited by

4References

18Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Thomas Nirschl · Putzbrunn, DE
Jan Otterstedt · Unterhaching, DE
Michael Bollu · Munich, DE
Wolf Allers · Munich, DE

Key dates

Filing date	Feb 6, 2009
Grant date	Mar 6, 2012
Priority date	—
Expiry date	Jan 30, 2030

Classification

Technology area (CPC G)Physics
CPC primaryG11C16/24
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In one embodiment, a bit-line interface is disclosed. The bit-line interface has a multiplexer having a plurality of bit-line outputs, and a write path coupled to a multiplexer signal input. The bit-line interface also has a read path coupled to the multiplexer signal input, wherein the read path and the write path share at least one component.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.