Semiconductor device and method of fabricating the same
US8134195B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2008 |
| Grant date | Mar 13, 2012 |
| Priority date | — |
| Expiry date | Apr 4, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/31
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device, and a method of fabricating the semiconductor device, which is able to prevent a leaning phenomenon from occurring between the adjacent storage nodes. The method includes forming a plurality of multi-layered pillar type storage nodes each of which is buried in a plurality of mold layers, wherein the uppermost layers of the multi-layered pillar type storage nodes are fixed by a support layer, etching a portion of the support layer to form an opening, and supplying an etch solution through the opening to remove the multiple mold layers. A process of depositing and etching the mold layer by performing the process 2 or more times to form the multi-layered pillar type storage node. Thus, the desired capacitance is sufficiently secured and the leaning phenomenon is avoided between adjacent storage nodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.