Decoupling capacitors
US8134824B2 · kind B2 · utility
9Cited by
4References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2008 |
| Grant date | Mar 13, 2012 |
| Priority date | — |
| Expiry date | Aug 22, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/35
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A decoupling capacitor is disclosed that has an n-type portion and a p-type portion in a semiconductor. The decoupling capacitor is formed of an NFET transistor and a PFET transistor, the PFET transistor being substantially formed in the n-type portion and the NFET transistor being substantially formed in the p-type portion, a boundary between the n-type portion and the p-type portion being substantially straight. The transistors are arranged such that a source and drain of the PFET transistor are connected to a high voltage rail and a source and drain of the NFET transistor are connected to a low voltage rail.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.