Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components
US8138021B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2010 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Jul 19, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/53183
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Packaged semiconductor components, apparatus for packaging semiconductor devices, methods of packaging semiconductor devices, and methods of manufacturing apparatus for packaging semiconductor devices. One embodiment of an apparatus for packaging semiconductor devices comprises a first board having a front side, a backside, arrays of die contacts, arrays of first backside terminals electrically coupled to the die contacts, arrays of second backside terminals, and a plurality of individual package areas that have an array of the die contacts, an array of the first backside terminals, and an array of the second backside terminals. The apparatus further includes a second board having a first side laminated to the front side of the first board, a second side, openings through the second board aligned with individual package areas that define die cavities, and arrays of front contacts at the second side electrically coupled to the second backside terminals by interconnects extending through the first board and the second board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.