In-situ silicon cap for metal gate electrode
US8138041B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2008 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Aug 26, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Structure and method of improving the performance of metal gate devices by depositing an in-situ silicon (Si) cap are disclosed. A wafer including a substrate and a dielectric layer is heated through a degas process, and then cooled to approximately room temperature. A metal layer is then deposited, and then an in-situ Si cap is deposited thereon. The Si cap is deposited without vacuum break, i.e., in the same mainframe or in the same chamber, as the heating, cooling and metal deposition processes. As such, the amount of oxygen available for interlayer oxide regrowth during subsequent processing is reduced as well as the amount oxygen trapped in the metal gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.