Inventor · Wyoming, OH, US

Rashmi Jha

19Patents
5h-index
36Co-inventors
62Inventor score

Filing activity: Sep 10, 2007 → Dec 24, 2019

Most-cited inventions

PatentTitleAreaCited byStatus
US7838908B2 Semiconductor device having dual metal gates and method of manufacture Electricity 23 Active
US8502343B1 Nanoelectric memristor device with dilute magnetic semiconductors Physics 23 Active
US7754594B1 Method for tuning the threshold voltage of a metal gate and high-k device Electricity 16 Active
US7943457B2 Dual metal and dual dielectric integration for metal high-k FETs Electricity 11 Active
US7498271B1 Nitrogen based plasma process for metal gate MOS device Electricity 7 Active
US7947549B2 Gate effective-workfunction modification for CMOS Electricity 5 Active
US7919379B2 Dielectric spacer removal Electricity 5 Active
US8053306B2 PFET with tailored dielectric and related methods and integrated circuit Electricity 5 Active
US9564505B2 Changing effective work function using ion implantation during dual work function metal gate integration Electricity 4 Active
US8436427B2 Dual metal and dual dielectric integration for metal high-K FETs Electricity 4 Active
US8753936B2 Changing effective work function using ion implantation during dual work function metal gate integration Electricity 4 Active
US10553793B2 Systems and methods for gated-insulator reconfigurable non-volatile memory devices Physics 3 Active
US8183642B2 Gate effective-workfunction modification for CMOS Electricity 3 Active
US8120144B2 Method for forming dual high-K metal gate using photoresist mask and structures thereof Electricity 1 Active
US8138041B2 In-situ silicon cap for metal gate electrode Electricity 1 Active
US7915115B2 Method for forming dual high-k metal gate using photoresist mask and structures thereof Electricity 1 Active
US10854812B2 Systems and methods for gated-insulator reconfigurable non-volatile memory devices Physics 0 Active
US7955926B2 Structure and method to control oxidation in high-k gate structures Electricity 0 Active
US10944053B2 Systems and methods for gated-insulator reconfigurable non-volatile memory devices Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.