Enhanced field effect transistor
US8138054B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2009 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Nov 26, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/235
Abstract
An enhanced FET capable of controlling current above and below a gate of the FET. The FET is formed on a semiconductor substrate. A source and drain are formed in the substrate (or in a well in the substrate). A first epitaxial layer of similar doping to the source and drain are grown on the source and drain, the first epitaxial layer is thicker than the gate, but not so thick as to cover the top of the gate. A second epitaxial layer of opposite doping is grown on the first epitaxial layer thick enough to cover the top of the gate. The portion of the second epitaxial layer above the gate serves as a body through which the gate controls current flow between portions of the first epitaxial layer over the drain and the source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.