Redundancy design with electro-migration immunity
US8138603B2 · kind B2 · utility
9Cited by
7References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 6, 2008 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | May 3, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An IC interconnect for high direct current (DC) that is substantially immune to electro-migration (EM) damage, a design structure of the IC interconnect and a method of manufacture of the IC interconnect is provided. The structure has electro-migration immunity and redundancy of design, which includes a plurality of wires laid out in parallel and each of which are coated with a liner material. Two adjacent of the wires are physically contacted to each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.