Method of manufacturing non-volatile memory cell using self-aligned metal silicide
US8158519B2 · kind B2 · utility
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Key dates
| Filing date | Oct 20, 2008 |
| Grant date | Apr 17, 2012 |
| Priority date | — |
| Expiry date | Mar 5, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/976
Abstract
In a method of manufacturing a non-volatile memory cell, a self-aligned metal silicide is used in place of a conventional tungsten metal layer to form a polysilicon gate, and the self-aligned metal silicide is used as a connection layer on the polysilicon gate. By using the self-aligned metal silicide to form the polysilicon gate, the use of masks in the etching process may be saved to thereby enable simplified manufacturing process and accordingly, reduced manufacturing cost. Meanwhile, the problem of resistance shift caused by an oxidized tungsten metal layer can be avoided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.