EON Silicon Solution Inc.
14Patents
14Active
14Granted
48Portfolio score
Filing activity: Jun 13, 2007 → Feb 7, 2013 · 7 expiring within 5 years
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8654591B2 | Local word line driver and flash memory array device thereof | Physics | 7 | Active |
| US8982641B2 | Memory erasing method and driving circuit thereof | Physics | 3 | Active |
| US8633744B1 | Power reset circuit with zero standby current consumption | Electricity | 1 | Active |
| US7939423B2 | Method for manufacturing nonvolatile semiconductor memory device structure | Electricity | 1 | Active |
| US8012825B2 | Method of manufacturing the double-implant nor flash memory structure | Electricity | 0 | Active |
| US8923083B2 | Method of identifying damaged bitline address in non-volatile | Physics | 0 | Active |
| US8017488B2 | Manufacturing method of a NOR flash memory with phosphorous and arsenic ion implantations | Emerging Cross-Sectional Technologies | 0 | Active |
| US8325518B2 | Multi-level cell NOR flash memory device | Electricity | 0 | Active |
| US8158519B2 | Method of manufacturing non-volatile memory cell using self-aligned metal silicide | Emerging Cross-Sectional Technologies | 0 | Active |
| US8476156B1 | Manufacturing method of flash memory structure with stress area | Electricity | 0 | Active |
| US8008692B2 | Semiconductor memory structure with stress regions | Electricity | 0 | Active |
| US8730739B2 | Semiconductor device for accelerating erase verification process and method therefor | Physics | 0 | Active |
| US7529132B2 | Single-poly non-volatile memory | Physics | 0 | Active |
| US8537629B1 | Method of testing bitline in non-volatile memory device | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.