Semiconductor memory device having a block decoder for preventing disturbance from unselected memory blocks
US8159883B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2008 |
| Grant date | Apr 17, 2012 |
| Priority date | — |
| Expiry date | Jul 26, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device can improve electrical properties by prohibiting a leakage current, which flows through a memory cell, in such a way as to turn off a drain select transistor, a source select transistor and a side transistor of an unselected memory cell block when the semiconductor memory device operates. The semiconductor memory device includes a memory cell block in which a plurality of memory cells, drain and source select transistors, and side word line transistors are connected in a string structure, a block decoder for outputting a block select signal in response to predecoded address signals and controlling the drain and source select transistors and the side word line transistors, and a block switch for connecting a global word line to word lines of the memory cell block in response to the block select signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.