Method for fabricating an isolation structure
US8163625B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2010 |
| Grant date | Apr 24, 2012 |
| Priority date | — |
| Expiry date | Apr 5, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76232
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The disclosure relates to integrated circuit fabrication, and more particularly to an electronic device with an isolation structure having almost no divot. An exemplary method for fabricating an isolation structure, comprising: forming a pad oxide layer over a top surface of a substrate; forming an opening in the pad oxide layer, exposing a portion of the substrate; etching the exposed portion of the substrate, forming a trench in the substrate; filling the trench with an insulator; exposing a surface of the pad oxide layer and a surface of the insulator to a vapor mixture including at least an NH3 and a fluorine-containing compound; and heating the substrate at a temperature between 100° C. to 200° C.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.