Hao-Ming Lien
31Patents
6h-index
52Co-inventors
68Inventor score
Filing activity: Jun 8, 2005 → Jan 8, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7948799B2 | Structure and method of sub-gate NAND memory with bandgap engineered SONOS devices | Electricity | 30 | Active |
| US8895446B2 | Fin deformation modulation | Electricity | 25 | Active |
| US7414889B2 | Structure and method of sub-gate and architectures employing bandgap engineered SONOS devices | Electricity | 11 | Active |
| US8735252B2 | Method of semiconductor integrated circuit fabrication | Electricity | 9 | Active |
| US8193586B2 | Sealing structure for high-K metal gate | Electricity | 7 | Active |
| US9647066B2 | Dummy FinFET structure and method of making same | Electricity | 7 | Active |
| US9276062B2 | Fin deformation modulation | Electricity | 5 | Active |
| US8329552B1 | Semiconductor device and method of manufacture | Electricity | 5 | Active |
| US8450161B2 | Method of fabricating a sealing structure for high-k metal gate | Electricity | 5 | Active |
| US9142402B2 | Uniform shallow trench isolation regions and the method of forming the same | Electricity | 4 | Active |
| US9177955B2 | Isolation region gap fill method | Electricity | 4 | Active |
| US7218554B2 | Method of refreshing charge-trapping non-volatile memory using band-to-band tunneling hot hole (BTBTHH) injection | Physics | 3 | Expired |
| US7276417B2 | Hybrid STI stressor with selective re-oxidation anneal | Electricity | 3 | Expired |
| US10170367B2 | Semiconductor device and method | Electricity | 2 | Active |
| US8404561B2 | Method for fabricating an isolation structure | Electricity | 1 | Active |
| US9443961B2 | Semiconductor strips with undercuts and methods for forming the same | Electricity | 1 | Active |
| US8163625B2 | Method for fabricating an isolation structure | Electricity | 1 | Active |
| US8736016B2 | Strained isolation regions | Electricity | 1 | Active |
| US8629508B2 | Semiconductor device and method of manufacture | Electricity | 1 | Active |
| US7852673B2 | Method for operating nonvolatitle memory array | Electricity | 0 | Active |
| US8828841B2 | Semiconductor device and method of manufacture | Electricity | 0 | Active |
| US9564488B2 | Strained isolation regions | Electricity | 0 | Active |
| US8580653B2 | Method for fabricating an isolation structure | Electricity | 0 | Active |
| US9017763B2 | Injector for forming films respectively on a stack of wafers | Electricity | 0 | Active |
| US9779980B2 | Uniform shallow trench isolation regions and the method of forming the same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.