On/off ratio for non-volatile memory device and method
US8168506B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 13, 2010 |
| Grant date | May 1, 2012 |
| Priority date | — |
| Expiry date | Jul 13, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/884
Abstract
This application describes a method of forming a switching device. The method includes forming a first dielectric material overlying a surface region of a substrate. A bottom wiring material is formed overlying the first dielectric material and a switching material is deposited overlying the bottom wiring material. The bottom wiring material and the switching material is subjected to a first patterning and etching process to form a first structure having a top surface region and a side region. The first structure includes at least a bottom wiring structure and a switching element having a top surface region including an exposed region of the switching element. A second dielectric material is formed overlying at least the first structure including the exposed region of the switching element. The method forms a first opening region in a portion of the second dielectric layer to expose a portion of the top surface region of the switching element. A dielectric side wall structure is formed overlying a side region of the first opening region. A top wiring material including a conductive material is formed overlying at lease the top surface region of the switching element such that the c…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.