Patent · US Active

Transaction based shared data operations in a multiprocessor environment

US8176266B2 · kind B2 · utility

3Cited by

21References

9Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Sailesh Kottapalli · San Jose, US
John H. Crawford · Saratoga, US
Kushagra Vaid · San Jose, US

Key dates

Filing date	Nov 10, 2010
Grant date	May 8, 2012
Priority date	—
Expiry date	Nov 10, 2030

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/544
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The apparatus and method described herein are for handling shared memory accesses between multiple processors utilizing lock-free synchronization through transactional-execution. A transaction demarcated in software is speculatively executed. During execution invalidating remote accesses/requests to addresses loaded from and to be written to shared memory are tracked by a transaction buffer. If an invalidating access is encountered, the transaction is re-executed. After a pre-determined number of times re-executing the transaction, the transaction may be re-executed non-speculatively with locks/semaphores.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.