Creating metal gate structures using Lithography-Etch-Lithography-Etch (LELE) processing sequences
US8183062B2 · kind B2 · utility
3Cited by
6References
19Claims
0Family size
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Key dates
| Filing date | Feb 24, 2009 |
| Grant date | May 22, 2012 |
| Priority date | — |
| Expiry date | Sep 15, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70466
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The invention can provide apparatus and methods of creating metal gate structures on wafers in real-time using Lithography-Etch-Lithography-Etch (LELE) processing sequence. Real-time data and/or historical data associated with LELE processing sequences can be fed forward and/or fed back as fixed variables or constrained variables in internal-Integrated-Metrology modules (i-IMM) to improve the accuracy of the metal gate structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.