Transistor
US8188514B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 12, 2009 |
| Grant date | May 29, 2012 |
| Priority date | — |
| Expiry date | Feb 9, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
An HEMT type transistor is disclosed that is a normally off type, and in which variations in the gate threshold voltage are small. A transistor is provided with a p-type region, a barrier region, an insulation film, a gate electrode. The channel region is connected to an upper surface of the p-type region. The channel region is n-type or i-type and provided with a first channel region and a second channel region. The barrier region is forming a hetero-junction with an upper surface of the first channel region. The insulation film is connected to an upper surface of the second channel region and an upper surface of the barrier region. The gate electrode faces the second channel region and the barrier region via the insulation film. The first channel region and the second channel region are arranged in series in a current pathway.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.