Integrated structures of high performance active devices and passive devices
US8188591B2 · kind B2 · utility
1Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2010 |
| Grant date | May 29, 2012 |
| Priority date | — |
| Expiry date | Nov 23, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated structures having high performance CMOS active devices mounted on passive devices are provided. The structure includes an integrated passive device chip having a plurality of through wafer vias, mounted to a ground plane. The structure further includes at least one CMOS device mounted on the integrated passive device chip using flip chip technology and being grounded to the ground plane through the through wafer vias of the integrated passive device chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.