Inventor · South Burlington, VT, US

Daniel S. Vanslette

23Patents
4h-index
36Co-inventors
63Inventor score

Filing activity: Sep 18, 1998 → Aug 3, 2018

Most-cited inventions

PatentTitleAreaCited byStatus
US8791016B2 Through silicon via wafer, contacts and design structures Electricity 19 Active
US8021943B2 Simultaneously formed isolation trench and through-box contact for silicon-on-insulator technology Electricity 19 Active
US8299615B2 Methods and structures for controlling wafer curvature Emerging Cross-Sectional Technologies 15 Active
US6245668A Sputtered tungsten diffusion barrier for improved interconnect robustness Electricity 8 Expired
US9312426B2 Structure with a metal silicide transparent conductive electrode and a method of forming the structure Emerging Cross-Sectional Technologies 3 Active
US8003536B2 Electromigration resistant aluminum-based metal interconnect structure Electricity 2 Active
US10147839B2 Method of forming a metal silicide transparent conductive electrode Emerging Cross-Sectional Technologies 2 Active
US9455214B2 Wafer frontside-backside through silicon via Electricity 1 Active
US8084864B2 Electromigration resistant aluminum-based metal interconnect structure Electricity 1 Active
US8918988B2 Methods for controlling wafer curvature Emerging Cross-Sectional Technologies 1 Active
US6762121B2 Method of forming refractory metal contact in an opening, and resulting structure Emerging Cross-Sectional Technologies 1 Expired
US8188591B2 Integrated structures of high performance active devices and passive devices Electricity 1 Active
US9390969B2 Integrated circuit and interconnect, and method of fabricating same Electricity 0 Active
US6838364B2 Sputtered tungsten diffusion barrier for improved interconnect robustness Electricity 0 Expired
US8232139B1 Integrated structures of high performance active devices and passive devices Electricity 0 Active
US11195969B2 Method of forming a metal silicide transparent conductive electrode Emerging Cross-Sectional Technologies 0 Active
US9406562B2 Integrated circuit and design structure having reduced through silicon via-induced stress Electricity 0 Active
US11056610B2 Method of forming a metal silicide transparent conductive electrode Emerging Cross-Sectional Technologies 0 Active
US9245850B2 Through silicon via wafer, contacts and design structures Electricity 0 Active
US9041210B2 Through silicon via wafer and methods of manufacturing Electricity 0 Active
US6900505B2 Method of forming refractory metal contact in an opening, and resulting structure Emerging Cross-Sectional Technologies 0 Expired
US9443764B2 Method of eliminating poor reveal of through silicon vias Electricity 0 Active
US8809998B2 Semiconductor device including in wafer inductors, related method and design structure Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.