Patent · US Active

System and method of processing data using scalar/vector instructions

US8190854B2 · kind B2 · utility

9Cited by
14References
32Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 20, 2010
Grant dateMay 29, 2012
Priority date
Expiry dateJan 20, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/3885
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method of processing data is disclosed that includes performing a fetch of a plurality of instructions from a memory unit. The method also includes grouping the plurality of instructions into packets of instructions of different types for parallel execution by a plurality of instruction execution units. The packets of instructions include a first instruction and a second instruction. The method includes using a combined scalar and vector condition code register to execute the first instruction for a compare operation and the second instruction for a conditional operation using the combined scalar and vector condition code register. The method also includes when the compare operation is a scalar compare operation, receiving a scalar compare instruction for the scalar compare operation at an instruction executing unit and storing results of the scalar compare operation in the combined scalar and vector condition code register.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.