Local silicidation of via bottoms in metallization systems of semiconductor devices
US8193086B2 · kind B2 · utility
5Cited by
2References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2009 |
| Grant date | Jun 5, 2012 |
| Priority date | — |
| Expiry date | Jan 29, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76886
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Electromigration behavior in complex metallization systems of semiconductor devices may be enhanced at critical areas between a metal line and a via by locally forming a copper/silicon compound. In some illustrative embodiments, the formation of the copper/silicon compound may be combined with other treatments for cleaning the exposed surface areas and/or modifying the molecular structure thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.