Methods and systems for using electrical information for a device being fabricated on a wafer to perform one or more defect-related functions
US8194968B2 · kind B2 · utility
25Cited by
245References
85Claims
0Family size
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Key dates
| Filing date | Jan 7, 2008 |
| Grant date | Jun 5, 2012 |
| Priority date | — |
| Expiry date | Apr 7, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/30148
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Various methods and systems for using electrical information for a device being fabricated on a wafer to perform one or more defect-related functions are provided. One computer-implemented method includes using electrical information for a device being fabricated on a wafer to perform one or more defect-related functions. The one or more defect-related functions include one or more post-mask, defect-related functions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.