High aspect ratio trench structures with void-free fill material

US8198196B1 · kind B1 · utility

Assignee

• FAIRCHILD SEMICONDUCTOR CORPORATION · US

Inventors

• James J. Murphy · South Jordan, US
• Hui-Chi Chen · Dashulong, TW
• Eileen Valdez · South Jordan, US

Key dates

• Filing date: Jun 6, 2011
• Grant date: Jun 12, 2012
• Expiry date: Jun 6, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/668

Abstract

A field effect transistor (FET) includes a trench extending into a semiconductor region. A conductive electrode is disposed in the trench, and the conductive electrode is insulated from the semiconductor region by a dielectric layer. The conductive electrode includes a conductive liner lining the dielectric layer along opposite sidewalls of the trench. The conductive liner has tapered edges such that a thickness of the conductive liner gradually increases from a top surface of the conductive electrode to a point in lower half of the conductive electrode. The conductive electrode further includes a conductive fill material sandwiched by the conductive liner. The FET further includes a drift region of a first conductivity type in the semiconductor region, and a body region of a second conductivity type extending over the drift region. Source regions of the first conductivity type extend in the body region adjacent the trench.