Integrated circuit system with recessed through silicon via pads and method of manufacture thereof
US8202797B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2010 |
| Grant date | Jun 19, 2012 |
| Priority date | — |
| Expiry date | Nov 25, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacture of an integrated circuit system includes: providing a substrate with a face surface having a via therein and a back surface having a trench therein; filling the via with a conductive pillar; forming a recessed contact pad in the trench; filling the recessed contact pad partially with solder; and forming an under-bump metal having a base surface in electrical contact with the conductive pillar, and having sides that extend away from the face surface of the substrate and further extend beyond the base surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.