Semiconductor devices including dual gate structures
US8207582B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 5, 2009 |
| Grant date | Jun 26, 2012 |
| Priority date | — |
| Expiry date | Jan 5, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/685
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices including dual gate structures and methods of forming such semiconductor devices are disclosed. For example, semiconductor devices are disclosed that include a first gate stack that may include a first conductive gate structure formed from a first material, and a second gate stack that may include a dielectric structure formed from an oxide of the first material. For another example, methods including forming a high-K dielectric material layer over a semiconductor substrate, forming a first conductive material layer over the high-K dielectric material layer, oxidizing a portion of the first conductive material layer to convert the portion of the first conductive material layer to a dielectric material layer, and forming a second conductive material layer over both the conductive material layer and the dielectric material layer are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.