Jaydeb Goswami
23Patents
3h-index
23Co-inventors
59Inventor score
Filing activity: Nov 23, 2004 → Jul 16, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8207582B2 | Semiconductor devices including dual gate structures | Electricity | 4 | Active |
| US8698173B2 | Solid state lighting devices with semi-polar facets and associated methods of manufacturing | Electricity | 4 | Active |
| US9972628B1 | Conductive structures, wordlines and transistors | Electricity | 4 | Active |
| US8431923B2 | Semiconductor structure and semiconductor device including a diode structure and methods of forming same | Electricity | 3 | Active |
| US7510942B2 | Molecular modifications of metal/dielectric interfaces | Electricity | 3 | Expired |
| US8530305B2 | Nanodot charge storage structures and methods | Electricity | 2 | Active |
| US7344982B2 | System and method of selectively depositing Ruthenium films by digital chemical vapor deposition | Chemistry; Metallurgy | 2 | Expired |
| US8748273B2 | Semiconductor devices including dual gate structures and methods of fabrication | Electricity | 0 | Active |
| US11825662B2 | Ferroelectric capacitor, a ferroelectric memory cell, an array of ferroelectric memory cells, and a method of forming a ferroelectric capacitor | Electricity | 0 | Active |
| US9099472B2 | Semiconductor constructions, methods of forming conductive structures and methods of forming DRAM cells | Electricity | 0 | Active |
| US11011378B2 | Atom implantation for reduction of compressive stress | Electricity | 0 | Active |
| US9202786B2 | Low-resistance interconnects and methods of making same | Electricity | 0 | Active |
| US8481414B2 | Incorporating impurities using a discontinuous mask | Electricity | 0 | Active |
| US11101274B2 | Ferroelectric capacitor, a ferroelectric memory cell, an array of ferroelectric memory cells, and a method of forming a ferroelectric capacitor | Electricity | 0 | Active |
| US8592985B2 | Methods of forming conductive structures and methods of forming DRAM cells | Electricity | 0 | Active |
| US7863176B2 | Low-resistance interconnects and methods of making same | Electricity | 0 | Active |
| US10147727B2 | Conductive structures, wordlines and transistors | Electricity | 0 | Active |
| US7361596B2 | Semiconductor processing methods | Electricity | 0 | Expired |
| US9397105B2 | Nanodot charge storage structures | Electricity | 0 | Active |
| US8372671B2 | Solid state devices with semi-polar facets and associated methods of manufacturing | Electricity | 0 | Active |
| US9142670B2 | Methods of forming dual gate structures | Electricity | 0 | Active |
| US8846512B2 | Incorporating impurities using a mask | Electricity | 0 | Active |
| US7622388B2 | Methods of forming titanium-containing materials | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.