Low thermal mass semiconductor wafer boat
US8220647B2 · kind B2 · utility
2Cited by
26References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2011 |
| Grant date | Jul 17, 2012 |
| Priority date | — |
| Expiry date | Sep 14, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67309
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer boat for a semiconductor wafer includes vertical rods, fingers supported by the vertical rods, and plates supported by the fingers. The plate has a support surface for supporting the wafer and a recessed surface spaced from the support surface and spaced from the wafer. A plurality of holes extends from the recessed surface, and the support surface is free of holes to inhibit contamination of the wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.