Method and system for template assisted wafer bonding
US8222084B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 20, 2011 |
| Grant date | Jul 17, 2012 |
| Priority date | — |
| Expiry date | May 20, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/852
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a composite semiconductor structure includes providing an SOI substrate including a plurality of silicon-based devices and providing a compound semiconductor substrate including a plurality of photonic devices. The method also includes dicing the compound semiconductor substrate to provide a plurality of photonic dies. Each die includes one or more of the plurality of photonics devices. The method further includes providing an assembly substrate, mounting the plurality of photonic dies on predetermined portions of the assembly substrate, aligning the SOI substrate and the assembly substrate, joining the SOI substrate and the assembly substrate to form a composite substrate structure, and removing at least a portion of the assembly substrate from the composite substrate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.