Data line management in a memory device
US8223561B2 · kind B2 · utility
2Cited by
0References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 8, 2011 |
| Grant date | Jul 17, 2012 |
| Priority date | — |
| Expiry date | Jul 8, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3418
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods for programming a memory device, memory devices configured to perform the disclosed programming methods, and memory systems having a memory device configured to perform the disclosed programming methods are provided. According to at least one such method, multiple pages of memory cells are inhibited during a programming operation such that memory cells enabled for programming are separated by two or more inhibited memory cells of the same row of memory cells regardless of the intended pattern of data states to be programmed into that row of memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.