Method of fabricating semiconductor integrated circuit device
US8227308B2 · kind B2 · utility
1Cited by
2References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2009 |
| Grant date | Jul 24, 2012 |
| Priority date | — |
| Expiry date | Nov 17, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/792
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor integrated circuit (IC) device can include forming a first silicide layer on at least a portion of a transistor on a substrate, forming nitrogen in the first silicide layer to form a second silicide layer, forming a first stress layer having a tensile stress on the substrate having the transistor formed thereon, and irradiating the first stress layer with ultraviolet (UV) light to form a second stress layer having greater tensile stress than the first stress layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.