Semiconductor package with increased I/O density and method of making same
US8227921B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 7, 2011 |
| Grant date | Jul 24, 2012 |
| Priority date | — |
| Expiry date | Nov 7, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention is related to a semiconductor package and method for fabricating the same wherein the semiconductor package includes a die pad having a semiconductor die mounted thereto, and two or more sets of leads or I/O pads which extend at least partially about the die pad in spaced relation thereto and to each other. The formation of the die pad and the leads of the leadframe are facilitated by the completion of multiple plating and chemical etching processes in a prescribed sequence. The present invention is further related to a semiconductor package and method for fabricating the same wherein the semiconductor package includes a semiconductor die electrically connected a plurality of leads or I/O pads via a flip chip type connection, each of the leads being formed by the completion of multiple plating and chemical etching processes in a prescribed sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.