Integrated structures of high performance active devices and passive devices
US8232139B1 · kind B1 · utility
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5References
19Claims
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Key dates
| Filing date | Mar 22, 2012 |
| Grant date | Jul 31, 2012 |
| Priority date | — |
| Expiry date | Mar 22, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated structures having high performance CMOS active devices mounted on passive devices are provided. The structure includes an integrated passive device chip having a plurality of through wafer vias, mounted to a ground plane. The structure further includes at least one CMOS device mounted on the integrated passive device chip using flip chip technology and being grounded to the ground plane through the through wafer vias of the integrated passive device chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.