Methods of integrating reverse eSiGe on NFET and SiGe channel on PFET, and related structure

US8232186B2 · kind B2 · utility

Assignees

• International Business Machines Corporation · US
• GlobalFoundries Inc. · KY

Inventors

• Eric C. Harley · Lagrangeville, US
• Judson R. Holt · Wappingers Falls, US
• Dominic J. Schepis · Wappingers Falls, US
• Michael D. Steigerwalt · Newburgh, US
• Linda Black · Wappingers Falls, US
• Rick Carter · Saratoga Springs, US

Key dates

• Filing date: May 29, 2008
• Grant date: Jul 31, 2012
• Expiry date: Dec 30, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/832

Abstract

Methods of integrating reverse embedded silicon germanium (SiGe) on an NFET and SiGe channel on a PFET, and a related structure are disclosed. One method may include providing a substrate including an NFET area and a PFET area; performing a single epitaxial growth of a silicon germanium (SiGe) layer over the substrate; forming an NFET in the NFET area, the NFET including a SiGe plug in a channel thereof formed from the SiGe layer; and forming a PFET in the PFET area, the PFET including a SiGe channel formed from the SiGe layer. As an option, the SiGe layer over the PFET area may be thinned.