Semiconductor device including field effect transistor with reduced electric field concentration
US8232609B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2010 |
| Grant date | Jul 31, 2012 |
| Priority date | — |
| Expiry date | Dec 22, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
Abstract
A semiconductor device includes: a semiconductor substrate; an impurity-doped region at a top surface of the semiconductor substrate; an insulating region located around the impurity-doped region on the top surface of the semiconductor substrate; a gate electrode on the impurity-doped region; a first electrode and a second electrode located on the impurity-doped region, sandwiching the gate electrode; a first pad located on the insulating region and connected to the gate electrode; a second pad facing the first pad across the impurity-doped region, on the insulating region, and connected to the second electrode; and a conductor located between the first electrode and the second pad on the insulating region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.