Semiconductor structure having a contact-level air gap within the interlayer dielectrics above a semiconductor device and a method of forming the semiconductor structure using a self-assembly approach

US8232618B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Gregory Breyta · San Jose, US
• David V. Horak · South Burlington, US
• Elbert E. Huang · Carmel, US
• Charles W. Koburger, III · Delmar, US
• Douglas C. La Tulipe, Jr. · Albany, US
• Shom Ponoth · Irvine, US

Key dates

• Filing date: Aug 11, 2010
• Grant date: Jul 31, 2012
• Expiry date: Nov 25, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/601
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Disclosed are embodiments of a semiconductor structure having a contact-level air gap within the interlayer dielectrics above a semiconductor device in order to minimize parasitic capacitances (e.g., contact-to-contact capacitance, contact-to-diffusion region capacitance, gate-to-contact capacitance, gate-to-diffusion region capacitance, etc.). Specifically, the structure can comprise a semiconductor device on a substrate and at least three dielectric layers stacked above the semiconductor device. An air gap is positioned with the second dielectric layer aligned above the semiconductor device and extending vertically from the first dielectric layer to the third dielectric layer. Also disclosed are embodiments of a method of forming such a semiconductor structure using a self-assembly approach.