Shom Ponoth
223Patents
18h-index
113Co-inventors
85Inventor score
Filing activity: Oct 11, 2002 → Feb 22, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8482132B2 | Pad bonding employing a self-aligned plated liner for adhesion enhancement | Electricity | 203 | Active |
| US8569152B1 | Cut-very-last dual-epi flow | Electricity | 59 | Active |
| US8420459B1 | Bulk fin-field effect transistors with well defined isolation | Electricity | 57 | Active |
| US8299625B2 | Borderless interconnect line structure self-aligned to upper and lower level contact vias | Electricity | 40 | Active |
| US9257348B2 | Methods of forming replacement gate structures for transistors and the resulting devices | Electricity | 31 | Active |
| US9064801B1 | Bi-layer gate cap for self-aligned contact formation | Electricity | 31 | Active |
| US9219153B2 | Methods of forming gate structures for FinFET devices and the resulting semiconductor products | Electricity | 26 | Active |
| US8785284B1 | FinFETs and fin isolation structures | Electricity | 24 | Active |
| US8232618B2 | Semiconductor structure having a contact-level air gap within the interlayer dielectrics above a semiconductor device and a method of forming the semiconductor structure using a self-assembly approach | Electricity | 24 | Active |
| US8581320B1 | MOS capacitors with a finfet process | Electricity | 24 | Active |
| US8390079B2 | Sealed air gap for semiconductor chip | Electricity | 22 | Active |
| US8906807B2 | Single fin cut employing angled processing methods | Electricity | 20 | Active |
| US9177820B2 | Sub-lithographic semiconductor structures with non-constant pitch | Electricity | 19 | Active |
| US8987790B2 | Fin isolation in multi-gate field effect transistors | Electricity | 19 | Active |
| US8999774B2 | Bulk fin-field effect transistors with well defined isolation | Electricity | 19 | Active |
| US8492274B2 | Metal alloy cap integration | Electricity | 18 | Active |
| US7790601B1 | Forming interconnects with air gaps | Electricity | 18 | Active |
| US8932918B2 | FinFET with self-aligned punchthrough stopper | Electricity | 18 | Active |
| US8288268B2 | Microelectronic structure including air gap | Electricity | 17 | Active |
| US9082853B2 | Bulk finFET with punchthrough stopper region and method of fabrication | Electricity | 17 | Active |
| US8604539B2 | Bulk fin-field effect transistors with well defined isolation | Electricity | 17 | Active |
| US8896067B2 | Method of forming finFET of variable channel width | Electricity | 16 | Active |
| US8592290B1 | Cut-very-last dual-EPI flow | Electricity | 15 | Active |
| US7943480B2 | Sub-lithographic dimensioned air gap formation and related structure | Electricity | 15 | Active |
| US8623712B2 | Bulk fin-field effect transistors with well defined isolation | Electricity | 15 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.