Dual metal gates using one metal to alter work function of another metal

US8236686B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Byoung Hun Lee · Wappingers Falls, US
• Sang Ho Bae · Seoul, KR
• Kisik Choi · Hopewell Junction, US
• Rino Choi · Austin, US
• Craig Huffman · Krugerville, US
• Prashant Majhi · San Jose, US
• Jong Hoan Sim · Austin, US
• Seung-Chul Song · Plano, US
• Zhibo Zhang · Raleigh, US

Key dates

• Filing date: May 30, 2008
• Grant date: Aug 7, 2012
• Expiry date: Dec 3, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/691
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Methods of forming dual metal gates and the gates so formed are disclosed. A method may include forming a first metal (e.g., NMOS metal) layer on a gate dielectric layer and a second metal (e.g., PMOS metal) layer on the first metal layer, whereby the second metal layer alters a work function of the first metal layer (to form PMOS metal). The method may remove a portion of the second metal layer to expose the first metal layer in a first region; form a silicon layer on the exposed first metal layer in the first region and on the second metal layer in a second region; and form the dual metal gates in the first and second regions. Since the gate dielectric layer is continuously covered with the first metal, it is not exposed to the damage from the metal etch process.