Power MOSFET having a strained channel in a semiconductor heterostructure on metal substrate
US8237195B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 9, 2008 |
| Grant date | Aug 7, 2012 |
| Priority date | — |
| Expiry date | Aug 26, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A field effect transistor device having a strained semiconductor channel region overlying a heterostructure-semiconductor on a metal substrate includes a first semiconductor layer overlying a first metal layer. The first semiconductor layer has a first semiconductor material and a second semiconductor material in a relaxed heterostructure and is heavily doped. A second semiconductor layer overlies the first semiconductor layer and has a first semiconductor material and a second semiconductor material in a relaxed heterostructure. The second semiconductor layer is more lightly doped than the first semiconductor layer. A trench extends into the second semiconductor layer and a channel region has a strained layer of the first semiconductor material adjacent a trench sidewall. The strained channel region provides enhanced carrier mobility and improves performance of the field effect transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.